Semiconductor memory device and defect remedying method thereof

Static information storage and retrieval – Read/write circuit – Multiplexing

Reexamination Certificate

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C365S230030, C365S051000, C365S063000, C438S586000, C438S587000, C257S202000, C257S203000

Reexamination Certificate

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11714867

ABSTRACT:
A semiconductor memory device formed on a semiconductor chip includes first memory arrays, a plurality of second memory arrays, a first voltage generator, and first bonding pads. The semiconductor chip is divided into first, second and third rectangle regions and the third rectangle region is arranged between the first rectangle region and the second rectangle region. The first memory arrays are formed in the first rectangle region. The second memory arrays are formed in the second rectangle region. The voltage generator and first bonding pads are arranged in the third rectangle region. The first bonding pads are arranged between the first rectangle region and the voltage generator and no bonding pads are arranged between the voltage generator and the second memory arrays.

REFERENCES:
patent: 5068712 (1991-11-01), Murakami et al.
patent: 5297097 (1994-03-01), Etoh et al.

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