Static information storage and retrieval – Read/write circuit – Multiplexing
Reexamination Certificate
2008-03-18
2008-03-18
Phung, Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
Multiplexing
C365S230030, C365S051000, C365S063000, C438S586000, C438S587000, C257S202000, C257S203000
Reexamination Certificate
active
11714867
ABSTRACT:
A semiconductor memory device formed on a semiconductor chip includes first memory arrays, a plurality of second memory arrays, a first voltage generator, and first bonding pads. The semiconductor chip is divided into first, second and third rectangle regions and the third rectangle region is arranged between the first rectangle region and the second rectangle region. The first memory arrays are formed in the first rectangle region. The second memory arrays are formed in the second rectangle region. The voltage generator and first bonding pads are arranged in the third rectangle region. The first bonding pads are arranged between the first rectangle region and the voltage generator and no bonding pads are arranged between the voltage generator and the second memory arrays.
REFERENCES:
patent: 5068712 (1991-11-01), Murakami et al.
patent: 5297097 (1994-03-01), Etoh et al.
Endo Akira
Etoh Jun
Hori Ryoichi
Horiguchi Masashi
Ikenaga Shin'ichi
Antonelli, Terry Stout & Kraus, LLP.
Hitachi , Ltd.
Hitachi ULSI Systems Co. Ltd.
Le Toan
Phung Anh
LandOfFree
Semiconductor memory device and defect remedying method thereof does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory device and defect remedying method thereof, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device and defect remedying method thereof will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3958878