Semiconductor memory device and data read and write method...

Static information storage and retrieval – Read/write circuit – Precharge

Reexamination Certificate

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C365S063000, C365S189050, C365S205000

Reexamination Certificate

active

07154796

ABSTRACT:
A semiconductor memory device includes first and second global data line pairs connected to a local data line pair, allowing a reduced pre-charge voltage that lowers current consumption and increases operating speed. Also included are a sense amplifier for amplifying data of the second global data line pair and outputting the amplified data to a data line, and a write driver for outputting data of the data line to the first global data line pair during a write operation. Switching circuits are connected between the first and second global data line pairs, and the local data line and the first global data line pairs. The memory device further includes a first global data line pre-charge circuit for pre-charging the first global data line pair to a first voltage level, and a second global data line pre-charge circuit for pre-charging the second global data line pair to a second voltage level.

REFERENCES:
patent: 5892724 (1999-04-01), Hasegawa et al.
patent: 5982693 (1999-11-01), Nguyen
patent: 6246622 (2001-06-01), Sugibayashi
patent: 6396732 (2002-05-01), Osada et al.
patent: 6522565 (2003-02-01), Shimazaki et al.
patent: 2000-0019463 (2000-04-01), None
patent: 2003-0026010 (2003-03-01), None

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