Semiconductor memory apparatus

Details Semiconductor memory apparatus Semiconductor memory apparatus

2006-12-29

2010-02-16

Le, Thong Q (Department: 2827)

Static information storage and retrieval

Read/write circuit

Precharge

C365S230030, C365S207000, C365S189180, C365S189190

Reexamination Certificate

active

07663951

ABSTRACT:
A semiconductor memory apparatus includes a main bank configured to combine a first sub bank and a second sub bank. A center bitline sense amplifier array is arranged in a region where the first sub bank meets the second sub bank. A first precharge section is arranged above the first sub bank and a second precharge section is arranged below the second sub bank. The first precharge section precharges local input/output lines of the first sub bank and the second sub bank and the second precharge section precharges the local input/output lines.

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