Semiconductor integrated circuit arrangement fabrication method

Details Semiconductor integrated circuit arrangement fabrication method Semiconductor integrated circuit arrangement fabrication method

1997-05-15

1999-02-23

Schilling, Richard L.

Etching a substrate: processes

Gas phase etching of substrate

Application of energy to the gaseous etchant or to the...

216 68, 216 69, 216 70, B44C 122, C03C 1500, C23F 100

Patent

active

058740139

ABSTRACT:
To realize etching with a high selection ratio and a high accuracy in fabrication of an LSI, the composition of dissociated species of a reaction gas is accurately controlled when dry-etching a thin film on a semiconductor substrate by causing an inert gas excited to a metastable state in a plasma and a flon gas to interact with each other, and selectively obtaining desired dissociated species.

REFERENCES:
patent: 5290383 (1994-03-01), Koshimizu
patent: 5324388 (1994-06-01), Yamano et al.
patent: 5476182 (1995-12-01), Ishizuka et al.

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