Semiconductor integrated circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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Details

C714S744000

Reexamination Certificate

active

07913138

ABSTRACT:
A semiconductor integrated circuit, including a data input unit for receiving an input data signal to be supplied to an external data input terminal, a storage unit for storing the input data signal received by the data input unit, a timing generating unit for generating a timing signal in response to an output request signal, a data output unit for outputting, in synchronization with the timing signal, the input data signal stored in the storage unit as an output data signal, a test output control unit for outputting, in synchronization with the timing signal, and a data selector for outputting the output data signal supplied from the data output unit to the external data output terminal in a normal operation mode and outputting the input data signal supplied from the test output control unit to the external data output terminal in a test mode.

REFERENCES:
patent: 5566300 (1996-10-01), Naoe
patent: 6489819 (2002-12-01), Kono et al.
patent: 6944039 (2005-09-01), Nataraj et al.
patent: 7102959 (2006-09-01), Inuzuka et al.
patent: 7334168 (2008-02-01), Kai et al.
patent: 7480841 (2009-01-01), Kai et al.
patent: 2006-004509 (2006-01-01), None

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