Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2009-12-08
2011-11-08
Le, Dieu-Minh (Department: 2114)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S734000
Reexamination Certificate
active
08055946
ABSTRACT:
A semiconductor IC capable of debugging two or more processors at the same time using a single debugger and a semiconductor IC test system. The semiconductor IC includes processors operating at different frequencies, a trigger circuit which causes all of the processors to be in a debugging state when one of the processors is in the debugging state, and a JTAG circuit applying a boundary scan operation to the processors connected to a JTAG pin in series.
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Arm Limited; CoreSight: Architecture Specification; Sep. 29, 2004; pp. i, ii, 8-2, 8-3, 10-7, 10-9, 17-5, 17-9; http://www.arm.com.
Kang Shin-Chan
Kim Sun-Kyu
Le Dieu-Minh
Samsung Electronics Co,. Ltd.
Volentine & Whitt PLLC
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