Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-07-10
2007-07-10
Lamarre, Guy (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S735000, C714S738000, C714S719000, C714S030000, C324S073100, C324S763010
Reexamination Certificate
active
11095662
ABSTRACT:
A semiconductor device having a plurality of circuits with the same configuration, wherein since expected values in the number corresponding to the number of circuits are not required, operation tests are effectively performed in a short time. The semiconductor device has first, second and third digital filters with the same configuration. To test these digital filters, comparison circuits comparing an output value and an expected value are individually provided per one digital filter. The digital filters and the comparison circuits are daisy-chained such that the output values of the first and second digital filters are input as the expected values of the comparison circuits corresponding to the second and third digital filters, respectively. When the same test signal is input to each digital filter from a built-in self test (BIST) controller, abnormal circuits can be detected based on comparison results of the comparison circuits.
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Abraham Esaw
Arent & Fox LLP
Lamarre Guy
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