Semiconductor device with discontinuous CESL structure

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S371000, C257S374000, C257S900000, C257SE27062, C257SE27067, C257SE29128

Reexamination Certificate

active

07655984

ABSTRACT:
A semiconductor device using a CESL (contact etch stop layer) to induce strain in, for example, a CMOS transistor channel, and a method for fabricating such a device. A stress-producing CESL, tensile in an n-channel device and compressive in a p-channel device, is formed over the device gate structure as a discontinuous layer. This may be done, for example, by depositing an appropriate CESL, then forming an ILD layer, and simultaneously reducing the ILD layer and the CESL to a desired level. The discontinuity preferably exposes the gate electrode, or the metal contact region formed on it, if present. The upper boundary of the CESL may be further reduced, however, to position it below the upper boundary of the gate electrode.

REFERENCES:
patent: 7416973 (2008-08-01), Peters et al.
patent: 2006/0189053 (2006-08-01), Wang et al.
patent: 2007/0077765 (2007-04-01), Prince et al.
patent: 2007/0099360 (2007-05-01), Lee et al.
patent: 2007/0287240 (2007-12-01), Chen et al.
patent: 2008/0185659 (2008-08-01), Ke et al.

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