Semiconductor device with core and periphery regions

Details Semiconductor device with core and periphery regions Semiconductor device with core and periphery regions

2006-02-07

2006-02-07

Fourson, George (Department: 2823)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257SE27091

Reexamination Certificate

active

06995437

ABSTRACT:
A method for forming a semiconductor device that includes a line and space pattern with variable pitch and critical dimensions in a layer on a substrate. The substrate includes a first region (e.g., a core region) and a second region (e.g., a periphery region). A first sub-line and space pattern in the first region comprises a space of a dimension (A) less than achievable by lithographic processes alone. Further, a second sub-line and space pattern in the second region comprises at least one line including a second critical dimension (B) achievable by lithography. The method uses two critical masking steps to form a hard mask that includes in the core region a critical dimension (A) less than achievable at a resolution limit of lithography. Further, the method uses a single etch step to transfer the pattern of the hard mask to the layer.

REFERENCES:
patent: 4707218 (1987-11-01), Giammarco et al.
patent: 4792534 (1988-12-01), Tsuji et al.
patent: 5296410 (1994-03-01), Yang
patent: 5459345 (1995-10-01), Okudaira et al.
patent: 5747359 (1998-05-01), Yuan et al.
patent: 5766998 (1998-06-01), Tseng
patent: 5795830 (1998-08-01), Cronin et al.
patent: 5858834 (1999-01-01), Hirota et al.
patent: 5863707 (1999-01-01), Lin
patent: 6258671 (2001-07-01), Manning
patent: 6346724 (2002-02-01), Lee
patent: 6416933 (2002-07-01), Singh et al.
patent: 6482726 (2002-11-01), Aminpur et al.
patent: 6664180 (2003-12-01), Hui et al.
patent: 6828634 (2004-12-01), Oshima
patent: 6831335 (2004-12-01), Huang
patent: 6834013 (2004-12-01), Fan et al.
patent: 6887757 (2005-05-01), Chen et al.
patent: 2001/0003034 (2001-06-01), Furukawa et al.
patent: 2001/0015454 (2001-08-01), Lee et al.
patent: 2002/0006585 (2002-01-01), Koh et al.
patent: 2002/0063277 (2002-05-01), Ramsbey et al.
patent: 2004/0082162 (2004-04-01), Kang et al.
patent: 2005/0167759 (2005-08-01), Matsui et al.
patent: 0655773 (1995-05-01), None
patent: 04207076 (1992-07-01), None

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