Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-06-13
2006-06-13
Pham, Hoai (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S388000, C257S389000, C257S390000
Reexamination Certificate
active
07060575
ABSTRACT:
A method of forming self-aligned contact holes exposing source/drain regions in a semiconductor substrate using only etch mask layers is provided. In the method, sacrificial spacers are formed of a material having an excellent etching selectivity to the etch mask layers at sidewalls of gate electrodes in a cell area. Also, an interlevel dielectric layer is formed of a material having an excellent etching selectivity to the etch mask layers. The sacrificial spacers are removed when forming the self-aligned contact holes. Dielectric spacers are formed of a material having a low dielectric constant, without considering its etching selectivity to the interlevel dielectric layer. Thus, a reduction in the operational speed of a semiconductor device having transistors can be prevented.
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Jin Beom-jun
Kim Young-pil
Nam Byeong-yun
Ha Nathan W.
Myers Bigel & Sibley & Sajovec
Pham Hoai
Samsung Electronics Co,. Ltd.
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