Semiconductor device having MOS varactor and methods for...

Details Semiconductor device having MOS varactor and methods for... Semiconductor device having MOS varactor and methods for...

2006-08-22

2006-08-22

Coleman, W. David (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S184000

Reexamination Certificate

active

07094694

ABSTRACT:
In a method for manufacturing a semiconductor device, a gate electrode is formed in a first region. A silicide blocking layer is patterned such that a first gate spacer is formed on sidewalls of the gate electrode, and a silicide blocking layer pattern is formed in a second region. A lightly doped source/drain region is formed on surface of the first region. A second gate spacer is formed on sidewalls of the first gate spacer. A heavily doped source/drain region is formed on the surface of the first region. A silicide layer is formed on the gate electrode and the heavily doped source/drain region in the first region.

REFERENCES:
patent: 5589423 (1996-12-01), White et al.
patent: 5883010 (1999-03-01), Merrill et al.
patent: 6338993 (2002-01-01), Lien
patent: 11097649 (1999-04-01), None

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