Semiconductor device having metal gate patterns and related...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S592000, C438S655000, C438S656000, C438S658000, C257SE21636, C257SE21637

Reexamination Certificate

active

07494859

ABSTRACT:
A semiconductor device comprising a semiconductor substrate having a first impurity region and a second impurity region, a first gate pattern formed on the first impurity region, and a second gate pattern formed on the second impurity region is disclosed. The first gate pattern comprises a first gate insulation layer pattern, a metal layer pattern having a first thickness, and a first polysilicon layer pattern. The second gate pattern comprises a second gate insulation layer pattern, a metal silicide layer pattern having a second thickness smaller than the first thickness, and a second polysilicon layer pattern. The metal silicide layer pattern is formed from a material substantially the same as the material from which the metal layer pattern is formed. A method for manufacturing the semiconductor device is also disclosed.

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Wolf et al., Silicon Processing for the VLSI Era, vol. 1: Process Technology, 1986 by Lattice Press, p. 194.

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