Semiconductor device having a measuring pattern and a method...

Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure

Reexamination Certificate

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C257S620000, C257S622000

Reexamination Certificate

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06924505

ABSTRACT:
A semiconductor device having a measuring pattern that enhances measuring reliability and a method of measuring the semiconductor device using the measuring pattern. The semiconductor device includes a semiconductor substrate having a chip area in which an integrated circuit is formed, and a scribe area surrounding the chip area. The semiconductor device also includes a measuring pattern formed in the scribe area and having a surface sectional area to include a beam area in which measuring beams are projected, and a dummy pattern formed in the measuring pattern to reduce the surface sectional area of the measuring pattern. The surface sectional area of the dummy pattern occupies from approximately 5% to approximately 15% of a surface sectional area of the beam area.

REFERENCES:
patent: 5285082 (1994-02-01), Axer
patent: 5903489 (1999-05-01), Hayano
patent: 6218847 (2001-04-01), Matsushita
patent: 6822260 (2004-11-01), Nariman et al.
patent: 10144635 (1998-05-01), None

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