Semiconductor device formed with disposable spacer and liner...

Details Semiconductor device formed with disposable spacer and liner... Semiconductor device formed with disposable spacer and liner...

2001-10-09

2004-01-20

Whitehead, Jr., Carl (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S163000, C438S301000, C438S514000, C438S785000, C438S791000

Reexamination Certificate

active

06680233

ABSTRACT:

TECHNICAL FIELD
The present invention relates generally to the semiconductor devices and the fabrication thereof and, more particularly, to a semiconductor device fabricated with the use of a disposable high-K material layer.
BACKGROUND
Fabrication of semiconductor devices, such as metal oxide semiconductor field effect transistors (MOSFET) and complementary metal oxide semiconductor (CMOS) integrated circuits, involves numerous processing steps. Each step may potentially have an adverse effect on one or more device components.
In a typical MOSFET, a source and a drain are formed in an active region of a semiconductor layer by implanting N-type or P-type impurities in a layer of semiconductor material. Disposed between the source and drain is a body region. Disposed above the body region is a gate electrode. The gate electrode and the body are spaced apart by a gate dielectric layer. It is noted that MOSFETs can be formed in bulk format (for example, the active region being formed in a silicon substrate) or in a semiconductor-on-insulator (SOI) format (for example, in a silicon film that is disposed on a insulating layer that is, in turn, disposed on a silicon substrate).
A pervasive trend in modern integrated circuit manufacture is to produce transistors, and the structural features thereof, that are as small as possible. Although the fabrication of smaller transistors allows more transistors to be placed on a single monolithic substrate for the formation of relatively large circuit systems in a relatively small die area, slight imperfections in the formation of the component parts of a transistor can lead to poor transistor performance and failure of the overall circuit. As an example, during the fabrication process, certain unwanted portions of various device layers are removed using wet and/or dry chemical etching techniques. During the etching process desired portions of the layer being etched are protected by a disposable mask layer or a previously patterned device component formed from a material that has very little reaction with the etchant. Occasionally, the desired portion of the layer being etched is partially etched forming an undercut below the edges of the protective layer. Such an undercut can lead to a reduction in the operational performance of the device being fabricated. As an example, in some device fabrication processes, the gate dielectric can become undercut by the removal of a disposable spacer or liner.
Accordingly, there exists a need in the art for semiconductor devices, such as MOSFETs, that are formed using techniques intended to minimize imperfections in the resulting device.
SUMMARY OF THE INVENTION
According to one aspect of the invention, a method of fabricating a semiconductor device is provided. The method includes the steps of providing a layer of semiconductor material; forming a gate including a gate dielectric and a gate electrode on the layer of semiconductor material, the gate electrode spaced from the layer of semiconductor material by the gate dielectric and the gate defining sidewalls; forming a liner from a material having a relative permittivity of greater than about 8, the liner formed adjacent at least the sidewalls of the gate; forming sidewall spacers adjacent the gate and spaced apart from the gate by the liner; implanting dopant species to form deep doped regions of a source and a drain in the layer of semiconductor material; removing the spacers; and removing the liner using an etch process that has substantially no reaction with the gate dielectric.
According to another aspect of the invention, a semiconductor device is provided. The semiconductor device includes a layer of semiconductor material; a gate disposed on the layer of semiconductor material, the gate including a gate dielectric and a gate electrode, the gate electrode spaced from the layer of semiconductor material by the gate dielectric and the gate defining sidewalls; and a disposable liner composed of a material having a relative permittivity of greater than about 8, the liner disposed adjacent at least the sidewalls of the gate, wherein the liner is removable by an etch process that has substantially no reaction with the gate dielectric.
According to yet another aspect of the invention, the invention is a semiconductor device. The semiconductor device includes a layer of semiconductor material; a gate disposed on the layer of semiconductor material, the gate including a gate dielectric and a gate electrode, the gate electrode spaced from the layer of semiconductor material by the gate dielectric and the gate defining sidewalls; a liner disposed adjacent at least the sidewalls of the gate; and disposable sidewall spacers composed of a material having a relative permittivity of greater than about 8, the spacers disposed adjacent the gate and spaced apart from the gate by the liner, wherein the spacers are removable by an etch process that has substantially no reaction with the liner.


REFERENCES:
patent: 4559091 (1985-12-01), Allen et al.
patent: 6013553 (2000-01-01), Wallace et al.
patent: 6020024 (2000-02-01), Maiti et al.
patent: 6107130 (2000-08-01), Fulford et al.
patent: 6207485 (2001-03-01), Gardner et al.
patent: 6277738 (2001-08-01), Choi et al.
patent: 6303452 (2001-10-01), Chen et al.

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