Active solid-state devices (e.g. – transistors – solid-state diode – Encapsulated – With specified encapsulant
Patent
1998-08-20
2000-11-07
Hardy, David
Active solid-state devices (e.g., transistors, solid-state diode
Encapsulated
With specified encapsulant
257666, 257783, 257787, 257729, 438123, 438112, 438124, 438127, 438118, H01L 2329, H01L 2328, H01L 2348
Patent
active
061441082
DESCRIPTION:
BRIEF SUMMARY
TECHNICAL FIELD
The present invention relates to a semiconductor device with a semiconductor element sealed by resin, and more particularly to a thin (low-profile) large-scaled semiconductor device with excellent heat dissipation and solder heat-resistance and free from warp and a method of fabricating the same.
BACKGROUND OF THE INVENTION
A semiconductor device such as a transistor, IC and LSI has been conventionally sealed using a ceramic package, etc. and has been dominantly resin-sealed from the point of view of cost and mass production. For such resin-sealing, epoxy resin has been used to achieve good result. On the other hand, whereas an increase in the integration degree and large-scaling of a semiconductor element have advanced with technical development in a semiconductor filed, down-sizing and low-profiling of a semiconductor has been eagerly demanded. Thus, the rate of volume occupied by resin for sealing has decreased to reduce the thickness of a resin sealing portion. As a result, the semiconductor device has been likely to warp and to generate a connection trouble when the semiconductor device is mounted on a substrate. Particularly, on an ultra-thin semiconductor device less than 1.5 mm, the warp was remarkable. Further, with low-profiling and large-scaling of the semiconductor device, resin sealing has been demanded to have more improved crack-resistance to thermal stress generated during a thermal cycle test (TCT) which is an accelerating test for evaluating the performance of semiconductor sealing resin. Moreover, the surface mounting has become a main stream technique of mounting the semiconductor device so that the semiconductor device has been also required to have solder heat resistance which means that the semiconductor device is free from crack or swelling even when it is solder-immersed in an moist state. In this case also, the semiconductor device is required to have higher solder heat-resistance than before. In addition, development of the integration degree led to an increasing tendency of heat generated in the semiconductor device so that the heat generated during the operation is stored within the semiconductor device. Thus, the temperature might exceed a junction temperature of the semiconductor element, thus resulting in the malfunction of the semiconductor device.
In order to overcome these inconveniences to improve each characteristic evaluated by TCT, it has been proposed to modify epoxy resin as semiconductor sealing resin by silicon compound or supply it with rubber fine grains thereby reducing the thermal stress. Further, in order to improve crack resistance when immersed in solder, it has also been proposed to improve the contact between a lead frame and sealing resin, and select sealing resin with low moisture absorbency. Their effect, however, is not still sufficient. In the resin sealing type semiconductor device described above, since the sealing resin has a very low thermal conductivity, as disclosed in Japanese Patent Publication No. Hei. 5-198701, it has been proposed to dissipate heat through a metallic foil applied on a die pad securing a semiconductor element. In this case, however, a warp is generated owing to unbalance in the material in a thickness direction. In Japanese Patent Publication No. Sho. 63-187652, it is proposed to bond a metallic foil on either or both of the surfaces of a semiconductor device. This technique, since the adhesive or bonding agent layer for bonding is high in moisture absorbency, attenuates the effect of reducing solder heat resistance. In a low-profile semiconductor device widely used in recent years, a warp may be generated in a semiconductor device.
Under such a circumstance, the present invention intends to provide a semiconductor device which can give high solder heat resistance and thermal stress resistance when immersed in solder and high heat dissipation and free from warp, even when it is low-profiled to 1.5 mm or less.
DISCLOSURE OF THE INVENTION
The present invention relates to a semiconductor device and a met
REFERENCES:
patent: 5550711 (1996-08-01), Burns et al.
patent: 5559306 (1996-09-01), Mahulikar
patent: 5581121 (1996-12-01), Burns et al.
patent: 5821628 (1998-10-01), Hotta
Hotta Yuji
Kondo Seiji
Ohizumi Shinichi
Clark Jhihan B
Hardy David
Nitto Denko Corporation
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