Active solid-state devices (e.g. – transistors – solid-state diode – With means to increase breakdown voltage threshold
Reexamination Certificate
2001-01-17
2002-10-22
Christianson, Keith (Department: 2813)
Active solid-state devices (e.g., transistors, solid-state diode
With means to increase breakdown voltage threshold
Reexamination Certificate
active
06469359
ABSTRACT:
The present invention relates to a semiconductor device of planar structure comprising a pn-junction formed by a first layer doped according to a first conductivity type, n or p, and on top thereof a second layer doped according to a second conductivity type opposite to said first conductivity type, said second layer having a higher doping concentration than the first layer and having a lateral edge thereof provided with an edge termination with second zones of said second conductivity type separated by first zones of said first conductivity type arranged so that the total charge and/or the effective sheet charge density of dopants according to said second conductivity type is decreasing towards the laterally outer border of the edge termination, as well as a method for production thereof.
The invention is particularly, but not exclusively, directed to “wide band gap materials”, i.e. semiconductor materials having a wide energy gap between the valence band and the conduction band, such as SiC and diamond, since the problems dealt with by the invention are especially accentuated for these materials. Accordingly, the invention and the problems to be solved thereby will hereinafter be discussed for such materials, although it is applicable also to other semiconductor materials.
One of the very favourable properties of SiC is the high breakdown field, which is up to 10 times higher than for silicon, which makes it theoretically possible to construct comparatively thin devices of this material able to hold high voltages in the blocking state thereof resulting in high electric fields at said junction. However a problem to be solved for being able to fully utilize the inherent properties of SiC with respect to the high breakdown field thereof resides in obtaining a proper termination of the voltage absorbing pn-junction at the edge of this junction. The electric field at the periphery of the junction is normally enhanced compared to the electric field in the bulk of the junction. Accordingly, an edge termination is applied for reducing the risk of voltage breakdown or flash-over at the edge of the junction. A termination technique used for reducing the electric field at the pn-junction is to extend the junction by a so-called Junction Termination Extension (JTE) as defined in the introduction. This means that the charge contents of the highly doped side of the junction is gradually decreased towards the edge of the device. This means that in the reverse biased state of the junction the voltage will be distributed over a longer distance in the lateral direction away from the active region of the device towards the edge compared to the vertical direction of the device, and the electric field will thereby be substantially reduced at the edge of the device so formed.
A device according to the introduction is known through WO 98/02924 of the applicant. An advantage of a junction termination of this type is that it is theoretically possible to use the same doping concentrations in all said second zones and still obtain the decrease of the effective sheet charge density of dopants toward the laterally outer border of the edge termination aimed at by using geometrical tricks, such as varying the spacing of adjacent zones. This may then simplify the manufacturing process of the edge termination, since the number of masking steps may be reduced. Although such a device is very favourable it should be possible to improve it in at least some aspects.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a semiconductor device of the type defined in the introduction as well as a method improved in at least some aspects with respect to such devices and methods already known and discussed above.
This object is according to the invention obtained by providing such a device with a third layer doped according to said first conductivity type on top of said second layer at least in the region of said edge termination for burying the edge termination of the device thereunder.
This means that the high electric field regions of the device will be buried into the material and possible peaks of the electric field will be smoothed out through said third layer on top thereof, so that there will be a reduced stress on a surface passivation to be applied on top of the device for insulating it from the environment.
According to a preferred embodiment of the invention said third layer has a substantial thickness for separating said edge termination by a substantial distance to an upper surface of the device, which is favourable for said reduction of stress on the surface passivation.
According to another preferred embodiment of the invention said effective sheet charge density of charge carriers according to said second conductivity type decreases according to a law resulting in a depletion of substantially the entire termination region extending from an active region of said second layer to the lateral edge of the device when a reverse bias of the magnitude for which the device is designed is applied across the pn-junction. This means that the voltage may increase nearly linear in the lateral direction away from said active region of the device resulting in a nearly constant electric field at the surface thereof, since peaks, ripples and the like will be smoothed out by said third layer. Doping of said second zones for obtaining such an electric field being substantially constant in the lateral direction of the device is subject to a further preferred embodiment of the invention.
According to other preferred embodiments of the invention the effective sheet charge density of charge carriers may be decreased by decreasing the area of said second zones forming an interface to said third layer in the lateral direction and/or increasing the lateral distance between said second zones in the lateral direction towards the border of the device.
According to another preferred embodiment of the invention the doping concentration of said second zones are substantially equal. This means that they may theoretically all be created in one single process step, which of course is advantageous from the cost point of view and for the rest also is valid for the embodiment defined in the previous paragraph.
According to another preferred embodiment of the invention said second zones of said second conductivity type are interconnected by a resistive member. This is advantageous for making the voltage gradually increasing in the lateral direction of the device for lowering the electric field at the edge thereof.
According to another preferred embodiment of the invention said second layer is buried also in an active region of the device adjacent to said edge termination. The invention is particularly advantageous for such a device having a buried pn-junction, since it offers the possibility to produce the second layer in said active region and the second zones of said edge termination in the same process step.
According to another preferred embodiment of the invention the device is a device having a buried grid formed by discrete zones of said second layer adjacent to said edge termination zones, so that the grid of the device is continued beyond the active region It will be very simple to obtain the edge termination by simply continue the grid of the device beyond the active region thereof. Such a device having a buried grid may for instance be a JFET or a MOSFET.
According to another preferred embodiment of the invention said first, second and third layers are made of SiC. For the reasons mentioned above, this is particularly advantageous.
A method for producing a device according to the invention involves the creation of all said second zones of said edge termination in one single implantation step for forming such zones with substantially equal doping concentration. This means a possibility of one single masking step for producing all the junction termination zones.
According to one preferred embodiment of the invention said third layer is there when said implantation step is carried out and this is carried out a
Bakowski Mietek
Gustafsson Ulf
Lendenmann Heinz
ABB Reasearch Ltd.
Christianson Keith
Connolly Bove & Lodge & Hutz LLP
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