Semiconductor device adapted for forming multiple scan chains

Details Semiconductor device adapted for forming multiple scan chains Semiconductor device adapted for forming multiple scan chains

2007-09-11

2007-09-11

Ton, David (Department: 2138)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S727000

Reexamination Certificate

active

10676536

ABSTRACT:
A device includes data input and data output pins such as found in a JTAG port and a first plurality of boundary scan cells. The device is configurable to support a secondary boundary scan cells formed from the first plurality of boundary scan cells and a second plurality of boundary scan cells in at least one external device. In one embodiment, the device includes a demultiplexer which may be configured to support a primary boundary scan chain between the JTAG port and the first plurality of boundary scan cells. The demultiplexer may also be configured to support the secondary boundary scan chain between the JTAG port and the first and the second plurality of boundary scan cells.

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