Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2007-07-24
2007-07-24
Lamarre, Guy (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C718S102000
Reexamination Certificate
active
10902105
ABSTRACT:
A semiconductor circuit can have a standard interface for external data, address and/or command interchange in normal operation and a further test interface provided for a test operation with a semiconductor component and with a BIST unit (built-in self-test) assigned to the semiconductor component. The semiconductor circuit can also have a BIST controller for initialization, testing and application-near setting of the semiconductor component, a read-only nonvolatile memory, a programmable nonvolatile memory, and a volatile memory. The processed data stored as operating, test and/or boot parameters in the programmable nonvolatile memory are used during booting and in normal operation for test and configuration purposes for application-near setting of the semiconductor circuit.
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Edell Shapiro & Finnan LLC
Infineon - Technologies AG
Lamarre Guy
Tabone, Jr. John J.
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