Self-repairing of microprocessor array structures

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing

Reexamination Certificate

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C714S005110, C714S710000

Reexamination Certificate

active

07415644

ABSTRACT:
A level of indirection is utilized when writing to a microprocessor array structure, thereby masking hard faults in the array structure. Among other benefits, this minimizes the use of a backward error recovery mechanism with its inherent delay for recovery. The indirection is used to effectively remove from use faulty portions of the array structure and substitute spare, functioning portions to perform the duties of the faulty portions. Thus, for example, faulty rows in microprocessor array structures are mapped out in favor of substitute, functioning rows.

REFERENCES:
patent: 4484292 (1984-11-01), Hong et al.
patent: 5233614 (1993-08-01), Singh
patent: 6839275 (2005-01-01), Van Brocklin et al.
patent: 7203106 (2007-04-01), Versen et al.

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