Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-07-18
2006-07-18
Lindsay, Jr., Walter L. (Department: 2812)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S257000, C438S266000, C438S267000
Reexamination Certificate
active
07078295
ABSTRACT:
Provided are non-volatile split-gate memory cells having self-aligned floating gate and the control gate structures and exemplary processes for manufacturing such memory cells that provide improved dimensional control over the relative lengths and separation of the split-gate elements. Each control gate includes a projecting portion that extends over at least a portion of the associated floating gate with the size of the projecting portion being determined by a first sacrificial polysilicon spacer that, when removed, produces a concave region in an intermediate insulating structure. The control gate is then formed as a polysilicon spacer adjacent the intermediate insulating structure, the portion of the spacer extending into the concave region determining the dimension and spacing of the projecting portion and the thickness of the interpoly oxide (IPO) separating the upper portions of the split-gate electrodes thereby providing improved performance and manufacturability.
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Jeon Hee Seog
Kim Yong Tae
Yoon Seung Beom
Harness Dickey & Pierce
Lindsay Jr. Walter L.
Samsung Electronics Co,. Ltd.
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