Self-aligned implant under transistor gate

Details Self-aligned implant under transistor gate Self-aligned implant under transistor gate

1999-06-17

2000-06-13

Fahmy, Wael

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438217, 438276, 438282, 438303, 438306, 438683, H01L 21336

Patent

active

060749202

ABSTRACT:
The invention comprises a transistor having a self-aligned implant under the gate. The transistor comprises a drain region, a source region opposite the drain region, and a channel region in a semiconductor substrate extending between the source region and the drain region. A front gate is disposed outwardly from the first substrate layer and is separated from the channel region by a dielectric layer. The front gate comprises a first gate layer disposed outwardly from the dielectric layer and a second gate layer disposed outwardly from the first gate layer. A self-aligned implant region is disposed inwardly from the channel region and in approximate vertical alignment with the front gate.

REFERENCES:
patent: 4356042 (1982-10-01), Gelay et al.
patent: 4889820 (1989-12-01), Hori
patent: 5188873 (1993-02-01), Delannoy
patent: 5658811 (1997-08-01), Kimura et al.

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