Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-09-05
2006-09-05
Whitehead, Jr., Carl (Department: 2813)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S331000
Reexamination Certificate
active
07101762
ABSTRACT:
A structure and method of manufacturing a double-gate integrated circuit which includes forming a laminated structure having a channel layer and first insulating layers on each side of the channel layer, forming openings in the laminated structure, forming drain and source regions in the openings, removing portions of the laminated structure to leave a first portion of the channel layer exposed, forming a first gate dielectric layer on the channel layer, forming a first gate electrode on the first gate dielectric layer, removing portions of the laminated structure to leave a second portion of the channel layer exposed, forming a second gate dielectric layer on the channel layer, forming a second gate electrode on the second gate dielectric layer, doping the drain and source regions, using self-aligned ion implantation, wherein the first gate electrode and the second gate electrode are formed independent of each other.
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Wong et al., “Self-Aligned (Top and Bottom) Double Gate MOSFET with a 25 nm Thick Silicon Channel”, IEDM 97, pp. 427-430.
Lee et al., “Super Self-Aligned Double-Gate MOSFET (SSDG) MOSFETs Utilizing Oxidation Rate Difference and Selective Epitaxy”, IEDM, Dec. 5, 1999, IEEE.
Cohen Guy M.
Wong Hon-Sum P.
Bryant Deloris
Gibb I.P. Law Firm LLC
International Business Machines - Corporation
Jr. Carl Whitehead
Tuchman, Esq. Ido
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