Self-aligned contacts for semiconductor device

Details Self-aligned contacts for semiconductor device Self-aligned contacts for semiconductor device

1997-12-29

2000-12-26

McDonald, Rodney G.

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

438706, 438707, 438710, 438714, 438723, 438729, 438734, 438735, 438737, H01L 2100

Patent

active

06165910&

ABSTRACT:
In a plasma processing chamber, a method for etching through a selected portion of an oxide layer of a wafer's layer stack to create a self-aligned contact opening is described. The wafer stack includes a substrate, a polysilicon layer disposed above the substrate, a nitride layer disposed above said polysilicon layer and the oxide layer disposed above the nitride layer. The method for etching includes etching through the oxide layer of the layer stack with a chemistry and a set of process parameters. The chemistry essentially includes C.sub.2 HF.sub.5 and CH.sub.2 F.sub.2 and the set of process parameters facilitate etching through the oxide layer without creating a spiked etch and etching the oxide layer through to the substrate without substantially damaging the nitride layer.

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