Selective silicon deposition for planarized dual surface...

Details Selective silicon deposition for planarized dual surface... Selective silicon deposition for planarized dual surface...

2008-05-27

2008-05-27

Kebede, Brook (Department: 2823)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S422000, C257SE21632

Reexamination Certificate

active

11375763

ABSTRACT:
A semiconductor process and apparatus provide a planarized hybrid substrate (225) having a more uniform polish surface (300) by thickening an SOI semiconductor layer (210) in relation to a previously or subsequently formed epitaxial silicon layer (220) with a selective silicon deposition process that covers the SOI semiconductor layer (210) with a crystalline semiconductor layer (216). By forming first gate electrodes (151) over a first SOI substrate (90) using deposited (100) silicon and forming second gate electrodes (161) over an epitaxially grown (110) silicon substrate (70), a high performance CMOS device is obtained which includes high-k metal PMOS gate electrodes (161) having improved hole mobility.

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