Selective reactive Ion etch (RIE) method for forming a narrow li

Details Selective reactive Ion etch (RIE) method for forming a narrow li Selective reactive Ion etch (RIE) method for forming a narrow li

1996-03-20

1998-03-17

Bowers, Jr., Charles L.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438300, 438301, 438721, 438738, H01L 21336

Patent

active

057286191

ABSTRACT:
A method for forming within an integrated circuit a narrow line-width high aspect ratio via through a first integrated circuit layer which resides upon a second integrated circuit layer. There is first formed upon a semiconductor substrate a second integrated circuit layer which has formed upon its surface a first integrated circuit layer. Through a first etch method, a partial via is then formed within the first integrated circuit layer to a distance of from about 2500 to about 4000 angstroms above the surface of the second integrated circuit layer. The first etch method is chosen to provide a partial via with substantially parallel sidewalls. Through a second etch method, the partial via is then etched completely through the first integrated circuit layer. The second etch method is chosen to possesses an etch selectivity ratio for the first integrated circuit layer with respect to the second integrated circuit layer of at least about 60:1. The method is preferably employed in forming narrow line-width high aspect ratio vias through insulator layers beneath which reside metal silicide layers formed upon integrated circuit device electrodes within integrated circuits.

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