Selective nitride liner formation for shallow trench isolation

Semiconductor device manufacturing: process – Chemical etching – Combined with coating step

Reexamination Certificate

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C438S257000, C438S745000, C257SE21008, C257S211000, C257S223000, C257S309000

Reexamination Certificate

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10970090

ABSTRACT:
A method for forming a divot free nitride lined shallow trench isolation (STI) feature including providing a substrate including an STI trench extending through an uppermost hardmask layer into a thickness of the substrate exposing the substrate portions; selectively forming a first insulating layer lining the STI trench over said exposed substrate portions only; backfilling the STI trench with a second insulating layer; planarizing the second insulating layer; and, carrying out a wet etching process to remove the uppermost hardmask layer.

REFERENCES:
patent: 5989975 (1999-11-01), Kuo
patent: 6001706 (1999-12-01), Tran et al.
patent: 6140242 (2000-10-01), Oh et al.
patent: 6261921 (2001-07-01), Yen et al.
patent: 6689665 (2004-02-01), Jang et al.
patent: 6746933 (2004-06-01), Beintner et al.

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