Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2006-08-07
2008-11-18
Huynh, Andy (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S199000, C438S261000, C438S287000, C438S591000, C438S785000, C257SE21202, C257SE21639
Reexamination Certificate
active
07452767
ABSTRACT:
A method of forming a CMOS structure, and the device produced therefrom, having improved threshold voltage and flatband voltage stability. The inventive method includes the steps of providing a semiconductor substrate having an nFET region and a pFET region; forming a dielectric stack atop the semiconductor substrate comprising an insulating interlayer atop a high k dielectric; removing the insulating interlayer from the nFET region without removing the insulating interlayer from the pFET region; and providing at least one gate stack in the pFET region and at least one gate stack in the nFET region. The insulating interlayer can be AlN or AlOxNy. The high k dielectric can be HfO2, hafnium silicate or hafnium silicon oxynitride. The insulating interlayer can be removed from the nFET region by a wet etch including a HCl/H2O2peroxide solution.
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Bojarczuk, Jr. Nestor A.
Cabral, Jr. Cyril
Cartier Eduard A.
Copel Matthew W.
Frank Martin M.
Huynh Andy
International Business Machines - Corporation
Scully , Scott, Murphy & Presser, P.C.
Trepp, Esq. Robert M.
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