Salicide integration method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438533, 438586, 438649, 438655, H01L 21336

Patent

active

058588469

ABSTRACT:
A method for preventing gate to source/drain bridging and reducing junction leakage by preventing defects in the source/drain region in the fabrication of a silicided polysilicon gate is described. A polysilicon gate electrode on a semiconductor substrate and associated source and drain regions within the semiconductor substrate are provided wherein spacers are formed on the sidewalls of the gate electrode. A layer of titanium is deposited over the gate electrode, spacers and source and drain regions within the semiconductor substrate. Arsenic ions are implanted into the titanium layer. The semiconductor substrate is annealed for a first time whereby the titanium layer is transformed into a titanium silicide layer except where the titanium layer overlies the spacers. The titanium layer overlying the spacers is stripped to leave the titanium silicide layer only on the top surface of the gate electrode and on the top surface of the semiconductor substrate overlying the source and drain regions. The semiconductor substrate is annealed for a second time whereby the titanium silicide is transformed into a lower resistance phase. An insulating layer is deposited over the surface of the semiconductor substrate covering the gate electrode. Metallization with electrical connections is provided to complete the fabrication of the integrated circuit device.

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