Reliable high voltage gate dielectric layers using a dual...

Details Reliable high voltage gate dielectric layers using a dual... Reliable high voltage gate dielectric layers using a dual...

2007-02-27

2007-02-27

Ha, Nathan W. (Department: 2814)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C257S500000

Reexamination Certificate

active

10702234

ABSTRACT:
Dual gate dielectric layers are formed on a semiconductor substrate for MOS transistor fabrication. A first dielectric layer (30) is formed on a semiconductor substrate (10). A first plasma nitridation process is performed on said first dielectric layer. The first dielectric layer (30) is removed in regions of the substrate and a second dielectric layer (50) is formed in these regions. A second plasma nitridation process is performed on the first dielectric layer and the second dielectric layer. MOS transistors (160, 170) are then fabricated using the dielectric layers (30, 50).

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patent: 04 154162 (1992-05-01), None

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