Recessed gate for a CMOS image sensor

Details Recessed gate for a CMOS image sensor Recessed gate for a CMOS image sensor

2007-04-13

2009-08-11

Andújar, Leonardo (Department: 2826)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S057000, C257S291000, C257S249000, C257S222000

Reexamination Certificate

active

07572701

ABSTRACT:
A novel CMOS image sensor cell structure and method of manufacture. The imaging sensor comprises a substrate having an upper surface, a gate comprising a dielectric layer formed on the substrate and a gate conductor formed on the gate dielectric layer, a collection well layer of a first conductivity type formed below a surface of the substrate adjacent a first side of the gate conductor, a pinning layer of a second conductivity type formed atop the collection well at the substrate surface, and a diffusion region of a first conductivity type formed adjacent a second side of the gate conductor, the gate conductor forming a channel region between the collection well layer and the diffusion region. A portion of the bottom of the gate conductor is recessed below the surface of the substrate. Preferably, a portion of the gate conductor is recessed at or below a bottom surface of the pinning layer to a depth such that the collection well intersects the channel region thereby eliminating any potential barrier interference caused by the pinning layer.

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