Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2011-01-18
2011-01-18
Parker, Kenneth A (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S296000, C257S390000, C257S393000, C257SE21661
Reexamination Certificate
active
07872290
ABSTRACT:
A memory cell of a semiconductor device and a method for forming the same, wherein the memory cell includes a substrate having active regions and field regions, a gate layer formed over the substrate, the gate layer including a plurality of access gates formed over the active regions of the substrate and a plurality of pass gates formed over the field regions of the substrate, first self-aligned contact regions formed between adjacent pass gates and access gates, and second self-aligned contact regions formed between adjacent access gates, wherein a width of each of the first self-aligned contact regions is larger than a width of each of the second self-aligned contact regions.
REFERENCES:
patent: 5398205 (1995-03-01), Yamaguchi
patent: 5732009 (1998-03-01), Tadaki et al.
patent: 5828096 (1998-10-01), Ohno et al.
patent: 5917211 (1999-06-01), Murata et al.
patent: 6037194 (2000-03-01), Bronner et al.
patent: 6063669 (2000-05-01), Takaishi
patent: 6188095 (2001-02-01), Hieke
patent: 6218697 (2001-04-01), Minn
patent: 6300655 (2001-10-01), Ema et al.
patent: 6339239 (2002-01-01), Alsmeier et al.
patent: 6362506 (2002-03-01), Miyai
patent: 6457163 (2002-09-01), Yang
patent: 6462368 (2002-10-01), Torii et al.
patent: 6483140 (2002-11-01), Matsuoka et al.
patent: 6770535 (2004-08-01), Yamada et al.
patent: 7091540 (2006-08-01), Kim et al.
patent: 2002/0073394 (2002-06-01), Milor et al.
patent: 2003/0027395 (2003-02-01), Park et al.
patent: 2003/0030090 (2003-02-01), Sasaki
patent: 39 05 634 (1989-08-01), None
patent: 63-170955 (1988-07-01), None
patent: 04-014253 (1992-01-01), None
patent: 05-291526 (1993-05-01), None
patent: 06-318680 (1994-11-01), None
patent: 09-237897 (1997-09-01), None
patent: 2000-036594 (2000-02-01), None
patent: 2000-91524 (2000-03-01), None
patent: 2001-210801 (2001-08-01), None
Kim Ji-Young
Park Jin-Jun
Diaz José R
Lee & Morse P.C.
Parker Kenneth A
Samsung Electronics Co,. Ltd.
LandOfFree
Recess transistor (TR) gate to obtain large self-aligned... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Recess transistor (TR) gate to obtain large self-aligned..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Recess transistor (TR) gate to obtain large self-aligned... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2644905