Read-out circuit for semiconductor memory device

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch

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36518911, 365203, G11C 700

Patent

active

060287969

ABSTRACT:
Disclosed is a read-out circuit for use with semiconductor memory devices such as image memories comprising both a group of randomly accessible memory cells and serial registers that are serially accessed. The read-out circuit contains presetting means for presetting the output side of a column selector of the memory before signal read-out. This prevents the drop in performance margin attributable to boosted parasitic capacity on the column selector output side.

REFERENCES:
patent: 4731758 (1988-03-01), Lam et al.
patent: 4995003 (1991-02-01), Watanabe et al.
patent: 5153459 (1992-10-01), Park et al.
patent: 5161120 (1992-11-01), Kajimoto et al.
Paul M. Chirlian, Analysis and Design of Integrated Electronic Circuit, 1981, p. 351.

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