Pseudo silicon on insulator MOSFET device

Details Pseudo silicon on insulator MOSFET device Pseudo silicon on insulator MOSFET device

1998-08-13

2000-06-06

Niebling, John F.

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438300, 438305, 438264, H01L 21336

Patent

active

060717831

ABSTRACT:
A process for forming a MOSFET device, featuring a heavily doped source/drain region, isolated from a semiconductor substrate, via use of a thin silicon oxide layer, has been developed. After formation of a lightly doped source/drain region, an opening is created in the semiconductor substrate, in a region between insulator spacers, on a gate structure, and insulator filled, shallow trench regions, resulting in lightly doped source/drain segments, remaining under the masking insulator spacers. After a thin silicon oxide layer is formed on the exposed silicon surfaces, in the openings, a silicon deposition, and etch back procedures are performed, partially refilling the openings to a depth that still allows the thin silicon oxide layer to be exposed on the sides of the lightly doped source/drain segment. After removal of the exposed portion of the thin silicon oxide layer, and after deposition and etch back of another silicon layer, completely filling the openings, a heavily doped source/drain region is formed in the silicon layers, residing in the openings.

REFERENCES:
patent: 5296392 (1994-03-01), Grula et al.
patent: 5575885 (1996-11-01), Hirabayashi et al.
patent: 5610083 (1997-03-01), Chan et al.
patent: 5691231 (1997-11-01), Kobayashi et al.
patent: 5786229 (1998-07-01), Park
patent: 5872043 (1999-02-01), Chen
patent: 5943575 (1999-08-01), Chung

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