Programmable pull-up buffer

Details Programmable pull-up buffer Programmable pull-up buffer

1994-10-25

1995-09-12

Yoo, Do Hyun

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365177, 36518911, 326 58, 326121, 327391, 327437, G11C 1300

Patent

active

054503566

ABSTRACT:
There is disclosed an integrated circuit having a buffer that includes an output driver for receiving data and for transferring the data to an output node to be placed on a bus. The buffer also includes a pull-up control device coupled to the output node. The control device is capable of being switched between a first state that couples the output node to a predetermined logic level and a second state that does not couple the output node to the predetermined logic level. Control logic coupled to the pull-up control device receives first and second logic signals to control the state of the control device. With the second logic signal in a first predetermined level, the first logic signal is capable of switching the control device to the first state when in a first predetermined state and to the second state when in a second predetermined state. The second logic signal when in a second predetermined level overrides the control of the first logic signal to maintain the control device in the second state.

REFERENCES:
patent: 4789967 (1988-12-01), Liou et al.
patent: 4961168 (1990-10-01), Tran
patent: 5206545 (1993-04-01), Huang
patent: 5239237 (1993-08-01), Tran et al.
patent: 5291080 (1994-03-01), Amagasaki
patent: 5293082 (1994-03-01), Bathaee
patent: 5305443 (1994-04-01), Franzo
patent: 5331593 (1994-07-01), Merritt et al.
patent: 5384735 (1995-01-01), Park et al.

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