Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2006-06-02
2009-06-09
Tan, Vibol (Department: 2819)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S727000, C713S182000
Reexamination Certificate
active
07546498
ABSTRACT:
Systems and methods are disclosed herein to provide techniques for providing programmable identification codes (IDCODE) for PLDs. For example, in accordance with an embodiment of the present invention, a programmable logic device includes a first non-volatile memory adapted to store a first identification code of the programmable logic device, and a second memory adapted to store a second identification code of the programmable logic device. A control circuit selects between the first identification code stored in the first non-volatile memory and the second identification code stored in the second memory to provide as an identification code for the programmable logic device.
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Agrawal Om P.
Fontana Fabiano
Tang Howard
Crawford Jason
Haynes and Boone LLP
Lattice Semiconductor Corporation
Tan Vibol
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