Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-06-08
2000-12-26
Whitehead, Jr., Carl
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438396, 438397, 438254, H01L 218242
Patent
active
061658391
ABSTRACT:
A process for forming a DRAM, cylindrical shaped, stacked capacitor structure, located under a bit line structure, has been developed. The process features defining a polysilicon cell plate structure, during the same photolithotgraphic and anisotropic etching procedures, used to open a bit line contact hole. The bit line contact hole is formed by first opening a top portion of the bit line contact hole, using a photoresist shape as an etch mask, and after the formation of silicon nitride spacers, on the sides of the top portion of the bit line contact hole, the bottom portion of the bit line contact hole is opened, using silicon nitride as an etch mask.
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Chiang Wen-Chuan
Lee Yu-Hua
Wu Cheng-Ming
Ackerman Stephen B.
Jr. Carl Whitehead
Saile George O.
Taiwan Semiconductor Manufacturing Company
Thomas Toniae M.
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