Process for the production of a semiconductor device having bett

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Multiple layers

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438674, 438786, 438789, 427577, 427579, B05D 306

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active

061535370

ABSTRACT:
A method for manufacturing a semiconductor device having improved adhesion at an interface between layers of dielectric material, comprising the steps of forming a first layer of dielectric material on at least one part of a structure defined in a semiconductor substrate and forming a second dielectric material layer superimposed on the least one part of the first layer. The method further includes the step of forming, in the part where the first and second layers are superimposed, an intermediate adhesion layer comprising a ternary compound of silicon, oxygen and carbon. The formation of the adhesion layer takes place at low temperature and in an atmosphere kept essentially free of oxidative substances different from those serving to provide the silicon and the carbon to the layer. Preferably the layer is formed by the plasma enhanced chemical vapour deposition technique. The ternary dielectric compound of silicon, oxygen and carbon obtained is preferably useful to aid in adhesion between layers of dielectric materials, particularly in semiconductor devices. Alternatively, in another embodiment of the invention, in a process which is more generally useful for deposition of a dielectric material layer comprising silicon, the layer is formed at low temperature by the chemical vapour deposition technique, preferably plasma enhanced, in an atmosphere kept essentially free of exogenous oxidative substances, (i.e., in which the oxidizer is contained in the molecules used to provide the species of atoms other than oxygen comprised in the layer).

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patent: 5840374 (1998-11-01), Ito et al.
Patent Abstracts of Japan, vol. 18, No. 518 (E-1612) Sep. 29, 1994 & JP-A-06 181 201 (Kawasaki Steel) & Database WPI, Week 9430, Derwent Publications Ltd., London, GB; AN 94-246345 & JP-A-6 181 201.
Patent Abstracts of Japan, vol. 14, No. 491 (M-1040) Oct. 25, 1990 & JP-A-02 200 454 (NEC) & Database WPI, Week 9038, Derwent Publications Ltd., London, GB; AN 90-285971 & JP-A-2 200 454.

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