Process for plasma etching of vias

Details Process for plasma etching of vias Process for plasma etching of vias

1994-07-08

1996-05-07

Powell, William

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

1566441, 1566561, 1566571, 216 18, 216 67, 216 75, 216 79, 437235, 437245, H01L 2100, C03C 1500, C23F 100, B44C 122

Patent

active

055142478

ABSTRACT:
Disclosed is a process for plasma etching a mask patterned dielectric film to form vias on a semiconductor wafer, so that the resulting etched structure is devoid of residues on the walls of the structure. A via is an opening through a dielectric material through which a point of contact of underlying metal with a metal film deposited over the dielectric is made. The underlying metal, when exposed to plasma, has a tendency to sputter onto the vertical wall portions of the contact via structures. The metal-containing sputtered material forms a residue that essentially cannot be removed in the subsequent photoresist stripping process typically used in semiconductor manufacturing. The plasma etch process in accordance with the invention enables removal of the sputtered metal by utilizing with the basic dielectric etch gases a gas that reacts with the metal to form volatile compounds which are readily evacuable.

REFERENCES:
patent: 4661204 (1987-04-01), Mathur et al.
patent: 5176790 (1993-01-01), Arleo et al.
patent: 5256245 (1993-10-01), Keller et al.
patent: 5354417 (1994-10-01), Cheung et al.

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