Process for integrating MOSFET devices, comprised of different g

Details Process for integrating MOSFET devices, comprised of different g Process for integrating MOSFET devices, comprised of different g

1997-12-08

1999-06-29

Chang, Joni

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438253, 438396, H01L 218242

Patent

active

059181192

ABSTRACT:
A semiconductor fabrication sequence has been developed, allowing the integration of MOSFET devices, comprised of different gate insulator layer thicknesses, with a capacitor structure. The fabrication sequence features the use of a first insulator layer, to be used as a gate insulator layer, for a first MOSFET device. A first polysilicon layer is used for creation of a first polysilicon gate structure, on the first gate insulator layer, and for creation of a lower electrode shape, for a capacitor structure. A second gate insulator layer is grown, greater in thickness than the first gate insulator layer, to be used as the gate insulator layer for a second MOSFET device, then followed by the creation of a second polysilicon gate structure, on the second gate insulator layer, pattered from a second polysilicon layer. The second gate insulator layer is also used for the capacitor dielectric layer, of the capacitor structure, with the upper electrode shape, of the capacitor structure, is also formed from patterning of the second polysilicon layer.

REFERENCES:
patent: 5444279 (1995-08-01), Lee
patent: 5502009 (1996-03-01), Lin
patent: 5554558 (1996-09-01), Hsu et al.
patent: 5631188 (1997-05-01), Chang et al.
patent: 5633520 (1997-05-01), Wu et al.
patent: 5759887 (1998-06-01), Ito
patent: 5792681 (1998-08-01), Chang et al.
patent: 5804488 (1998-09-01), Shih et al.

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