Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – By reaction with substrate
Reexamination Certificate
2000-03-09
2002-07-02
Lee, Eddie (Department: 2815)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
By reaction with substrate
C438S776000, C438S777000
Reexamination Certificate
active
06413881
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a process for forming thin gate oxide of enhanced reliability for MOS devices of integrated circuit structures, and the resulting product. More particularly, this invention relates to a product and a process for forming the product by forming a dopant barrier of nitrogen atoms in the upper surface region of a thin gate oxide beneath a thin polysilicon gate electrode by nitridation of the upper surface of the thin gate oxide whereby minimization of gate depletion and enhanced device performance may be maintained by the provision of a thin polysilicon gate electrode and a thin gate oxide while inhibiting penetration of gate electrode dopant into the gate oxide or the underlying channel region of the MOS device in the semiconductor substrate.
2. Description of the Related Art
As integrated circuit structures have continued to shrink in size of individual components, it has become necessary to accurately control the thickness of materials such as silicon oxide and polysilicon formed on the integrated circuit structures. For example, formation of an MOS transistor may require the formation of a high quality gate oxide of less than 4.0 nanometers (nm) in thickness, and a thin polysilicon gate electrode thereon of less than 300 nm. The use of such thin polysilicon gate electrodes provides a remedy for gate depletion, while enhanced performance of the resulting MOS devices results from the provision of both thin gate oxides and thin polysilicon gate electrodes.
However, since a polysilicon gate electrode requires doping to provide the desired electrical conductivity of the electrode, the problem of penetration of the polysilicon gate dopant into the underlying gate oxide and the channel region of the semiconductor substrate beneath the gate oxide is exacerbated when such thin gate oxides and thin polysilicon gate electrodes are utilized.
Implantation of nitrogen into a silicon substrate to control the thickness of a silicon oxide layer subsequently grown thereon has been previously demonstrated in the literature. As shown in prior art
FIG. 1
, a silicon substrate
2
can be masked by a resist mask
4
to expose only that portion of substrate
2
where it is desired to subsequently grow a thin oxide. The masked structure is then subject to a blanket implantation of nitrogen resulting in nitrogen atoms implanted into the exposed silicon substrate surface, as shown at
5
in FIG.
1
. Removal of mask
4
thereafter followed by growth of a silicon oxide layer
6
will result in a thin silicon oxide region
8
formed in the portion of silicon oxide layer
6
grown over nitrogen implanted region
5
of silicon substrate
2
, as shown in prior art FIG.
2
.
Thin oxide region
8
of oxide layer
6
is then utilized as the thin gate oxide of an MOS device by depositing a thin polysilicon layer over silicon oxide layer
6
and then patterning both the polysilicon layer and the underlying oxide layer
6
to form a thin polysilicon gate electrode
16
over thin gate oxide
9
formed from thin silicon oxide portion
8
of silicon oxide layer
6
, as shown in FIG.
3
. Insulating sidewall spacers
20
are then conventionally formed on the sidewalls of polysilicon gate electrode
16
, followed by implantation with a dopant (such as boron when a PMOS device is to be constructed, or phosphorus or arsenic when an NMOS device is being constructed) to both dope gate electrode
16
and to form source/drain regions
22
and
24
in silicon substrate
2
.
When the structure is then annealed to activate the dopant, the mobility of the dopant atoms (particularly boron atoms) and the thinness of both the thin polysilicon gate electrode and the thin gate oxide can result in migration of the dopant atoms such as boron atoms through the thin polysilicon gate into the underlying gate oxide, as well as through the thin gate oxide into the region of the silicon substrate beneath the gate oxide where the channel of the MOS device will be formed.
While the previous nitrogen implantation of the silicon substrate (to control the thickness of the silicon oxide layer grown in the nitrogen-implanted surface of the silicon substrate) also provides some barrier protection against penetration of the dopant atoms into the channel region of the silicon substrate, the amount of such implanted nitrogen incorporated into the thin oxide subsequently grown over and in the implanted substrate does not exceed a concentration of several atomic percent. Furthermore, the nitrogen incorporated into the oxide is incorporated into the region near substrate/oxide interface
10
(not oxide/polysilicon interface
12
). Consequently, as shown in prior art
FIG. 3
, any dopant atoms diffusing from the polysilicon gate electrode into the gate oxide can diffuse through the gate oxide and will pile up in the gate oxide near this lower interface, thereby degrading the gate oxide reliability.
Therefore, it would be desirable to provide a process which would form a barrier against penetration of gate electrode dopant into either the underlying thin gate oxide or the channel region of the silicon substrate beneath the gate oxide, while still permitting the formation and use of thin silicon oxide gate oxides and thin polysilicon gate electrodes to provide the desired gate depletion protection and enhanced device performance.
SUMMARY OF THE INVENTION
The invention comprises a process for inhibiting the passage of dopant from a thin polysilicon gate electrode into a thin gate oxide beneath the gate electrode, and thereby also inhibiting the further passage of such dopant through the thin gate oxide into the channel region of a silicon substrate beneath the gate oxide. The process comprises nitridation of the upper surface region of the thin gate oxide prior to formation of the thin polysilicon gate electrode over the nitridated surface of the gate oxide to thereby form a barrier of nitrogen atoms in the upper surface region of the gate oxide adjacent the interface between the gate electrode and the gate oxide to inhibit passage of dopant atoms in the polysilicon gate electrode into the gate oxide, or through the gate oxide into the channel region of the silicon substrate beneath the gate oxide during subsequent annealing of the structure.
In one embodiment, a thin gate oxide is first formed over the silicon substrate by implanting nitrogen atoms into the surface of the silicon substrate in the region where the silicon oxide will be formed over. Subsequent growth of a silicon oxide layer will result in the formation of thin silicon oxide in the nitrogen-implanted surface region of the silicon substrate. At least some of the implanted nitrogen atoms in the silicon substrate surface will then be incorporated into the thin gate oxide to thereby supplement the dopant barrier formed by the nitrogen atoms present in the upper surface region of the gate oxide layer due to the nitridation step of the invention.
In another embodiment, a selective portion of a silicon oxide layer on a silicon substrate may be selectively etched to thin the oxide to the desired thickness for a subsequently formed gate oxide. Such etching of the silicon oxide may be carried out using a nitrogen plasma with a bias applied to the silicon substrate, in which case nitridation of the surface of the etched silicon oxide may be carried out in the same apparatus, after the desired thickness of the silicon oxide layer is achieved, by removing the bias from the silicon substrate.
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Aronowitz Sheldon
Eib Nicholas
Haywood John
Kapre Ravindra Manohar
Kimball James P.
Díaz José R
Lee Eddie
LSI Logic Corporation
Taylor John
LandOfFree
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