Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1998-12-29
2000-10-03
Thomas, Tom
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438262, 438266, 438257, 257318, H01L 21336
Patent
active
061272248
ABSTRACT:
A non-volatile memory cell and a manufacturing process therefor are discussed. The cell is integrated in a semiconductor substrate and includes a floating gate transistor having a first source region, first drain region, and gate region projecting over the substrate between the first source and drain regions. The cell also includes a selection transistor having a second source region, second drain region, and respective gate region, projecting over the substrate between the second source and drain regions. The first and second regions are lightly doped and the cell comprises mask elements.
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Galanthay Theodore E.
Iannucci Robert
Owens Douglas W.
STMicroelectronics S.r.l.
Thomas Tom
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