Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1996-01-31
1998-06-23
Nguyen, Tuan H.
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438253, 438396, H01L 218242
Patent
active
057704988
ABSTRACT:
An etch process that uses a single partially etched spacer insulating layer to form both sidewall spacers and a diffusion barrier that protect areas of the substrate during subsequent processing steps in the formation of semiconductor devices such as Dynamic Random Access Memories (DRAMs). The process includes the steps of: (a) forming a gate electrode over a semiconductor substrate; (b) defining first and second contact regions in the substrate adjacent sides of the gate electrode; (c) conformally depositing a spacer insulating layer over the gate electrode and the contact regions; and (d) partially etching the spacer insulating layer to remove only a portion of the thickness of the spacer insulating layer at least over the contact regions of the substrate.
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patent: 4760033 (1988-07-01), Mueller
patent: 5126280 (1992-06-01), Chan et al.
patent: 5206183 (1993-04-01), Dennison
patent: 5292677 (1994-03-01), Dennison
patent: 5501998 (1996-03-01), Chen
Micro)n Technology, Inc.
Nguyen Tuan H.
Ormiston Steven R.
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