Process for fabricating semiconductor memory device with high da

Details Process for fabricating semiconductor memory device with high da Process for fabricating semiconductor memory device with high da

1997-05-21

1999-11-23

Booth, Richard

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438 97, 438637, 438786, H01L 218247, H01L 214763

Patent

active

059899573

ABSTRACT:
A semiconductor memory device such as a flash Electrically Erasable Programmable Read-Only Memory (Flash EEPROM) includes a floating gate with high data retention. A tungsten damascene local interconnect structure includes a silicon oxynitride etch stop layer which is formed using Plasma Enhanced Chemical Vapor Deposition (PECVD) at a temperature of at least 480.degree. C. such that the etch stop layer has a very low concentration of hydrogen ions. The minimization of hydrogen ions, which constitute mobile positive charge carriers, in the etch stop layer, minimizes recombination of the hydrogen ions with electrons on the floating gate, and thereby maximizes data retention of the device.

REFERENCES:
patent: 4363868 (1982-12-01), Takasaki et al.
patent: 4992306 (1991-02-01), Hochberg et al.
patent: 5010039 (1991-04-01), Ku et al.
patent: 5619072 (1997-04-01), Mehta
patent: 5747369 (1998-05-01), Kantimahanti et al.
patent: 5814551 (1998-09-01), Park et al.

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