Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Patent
1997-10-14
1998-11-10
Tsai, Jey
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
438305, 438704, 438760, H01L 218238, H01L 21336, H01L 21302
Patent
active
058343466
ABSTRACT:
A method for preventing bubble formation over source/drain active areas in p-channel MOSFETs is described. Bubble formation occurs when the source/drain areas and silicon containing gate electrodes are implanted with BF.sub.2.sup.+ molecule ions following an anisotropic LDD spacer etch using a plasma. It is found that the plasma causes the silicon surface to become prone to adsorption of BF.sub.2.sup.+ molecule ions during the source/drain/gate implantation. These adsorbed species are released and form bubbles during reflow of a subsequently deposited glass layer. The invention performs the spacer etch only partially with the anisotropic plasma and completes the spacer formation with a wet etch. The active silicon and gate electrode surfaces are thus not damaged by the plasma. Consequently adsorption of BF.sub.2.sup.+ molecule ions is inhibited and bubble formation does not occur during reflow.
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Liu Chwen-Ming
Shih Cheng-Yeh
Sun Yi-Lin
Ackerman Stephen B.
Jones Josetta I.
Saile George O.
Taiwan Semiconductor Manufacturing Company , Ltd.
Tsai Jey
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