Power and ground and signal layout for higher density integrated

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds

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Details

257778, H01L 2348, H01L 2352, H01L 2940

Patent

active

061407100

ABSTRACT:
An integrated circuit package including a die housing an integrated circuit and having a plurality of electrical contact pads on a surface of the die. The electrical contact pads include energizing contact pads for connecting power and ground lines to the integrated circuit, and include data contact pads. The energizing contact pads lie along the path of intersecting first and second directional lines. The intersecting directional lines define four quadrants on the surface of the die, each quadrant containing at least one data contact pad.

REFERENCES:
patent: 5952726 (1999-09-01), Liang
patent: 5969417 (1999-10-01), Yamashita et al.
patent: 5986346 (1999-11-01), Katoh
patent: 6049136 (2000-04-01), Humphrey et al.
patent: 6057596 (2000-05-01), Lin et al.
patent: 6064113 (2000-05-01), Kirkman

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