Post metalization chem-mech polishing dielectric etch

Details Post metalization chem-mech polishing dielectric etch Post metalization chem-mech polishing dielectric etch

1999-11-02

2003-04-22

Chaudhuri, Olik (Department: 2823)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S638000, C438S619000, C438S700000, C438S629000

Reexamination Certificate

active

06551924

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to semiconductor integrated circuit processing, and more particularly to a method for fabricating interconnect structures in quartz or related dielectric films and then selectively removing the dielectric without damaging the conducting layers.
BACKGROUND OF THE INVENTION
Fabrication of interconnect structures for semiconductors is conventionally accomplished using silicon dioxide (SiO
2
) as the dielectric and Al or Cu as the metallic conducting film. Current processes are optimized for these materials. However, new dielectrics are becoming available with more advantageous properties such as a reduced dielectric constant which can increase the speed of integrated circuits. The processing of these new dielectrics, however, has not yet been optimized.
Various films (“processing aids”) are used in the processing of low dielectric constant (k) materials, particularly to protect the low-k material from erosion during a chemical-mechanical polish (CMP) process. These “processing aid” films have a higher dielectric constant than the low-k films, and if left in the final structure, would increase the final effective dielectric constant, thus degrading the effect of the low dielectric constant insulator. Removing these films after they have served the integration purpose is thus desirable.
Reactive ion etching is one known method of removing dielectric films, but results in either the sputtering of exposed copper, removal of exposed liners, or contamination of the dielectric surface by redeposition of copper sputtered during the etch process. Additionally, damage or modification of the underlying protected low-k dielectric may occur due to exposure to the plasma process. With current copper liner metallurgy, etch of “processing aid” films (such as silicon dioxide or silicon nitride) can also etch the liner materials since these liners are etched in the same chemistries as the “processing aid” films.
Plasma etching is a commonly used technique for semiconductor manufacturing. Plasma etching consists of the application of an electromagnetic energy field to a suitable reactor vessel containing desired feed gas species and a substrate that is to be etched (typically a Si wafer, GaAs wafer or other such substrate). The choice of feed gas species and their rate of application, the amount of electromagnetic energy applied, and the configuration of the reactor vessel, all work together to determine the specific etch characteristics for that particular process. These characteristics include how quickly and uniformly different materials etch, and how the microstructure (profile/shape) of the materials evolves in time. The etch processes work by a number of simultaneous etching mechanisms, such as physical sputtering, spontaneous chemical etching, and chemical assisted sputtering.
It is known that certain feed gases or mixtures of feed gases are better suited to etch certain materials than other feed gases or mixtures. Thus, one knowledgeable in the art may choose gases containing certain elemental species because they are better suited for a particular problem. Still, the specific choice of feed gases to do a specific job is not automatic. Instead, the feed gas or mixture and rate of application are carefully chosen to balance a number of competing factors in the etch process evolution.
One desirable behavior in etch processes is a selective etch. Plasma etching possesses the ability to remove one or more materials that are desired to be removed, while not removing one or materials that are desired to remain in place. Some materials combinations easily confer the ability for one material to be removed selectively to others. For example, it is known that organic polymers may be removed selectively to silicon dioxide using a plasma containing oxygen feed gas. Other materials combinations present more of a problem to etch selectively. This often arises because the feed gas or mixture that etches one material will also etch other materials.
During the construction of integrated circuit devices, it is often necessary to construct structures where a conducting material or conducting materials are placed within an insulating layer in a three dimensional fashion. Further, this (these) conduction material(s) are often interconnected. For certain reasons, such as performance and ease of construction, it is sometimes desirable to build structures in one insulating material, but then replace it with another insulating material. In this case, it is desirable to be able to selectively remove the insulating material without damaging, degrading, or changing the conducting material(s).
In particular, a structure may be built in which the insulating material is chosen from materials such as silicon dioxide, silicon nitride, fluorinated silicon glass, undoped silicon glass, phosphorus silicon glass, boron-phosphorous silicon glass, and associated insulators in stoichiometric or non-stoichiometric forms. This structure may further be processed by known methods so that the insulating layer contains a conducting layer that consists of a conducting metal (e.g., Cu, Al, W, Ag) or conducting semiconductor (e.g., Si, Ge, C with appropriate impurities) and its associated “liner” layers (which are often refractory metals (Ta, Ti, W), refraction metal nitrides (TaN, TiN, WN), refractory metal alloys (TaSiN), or a combination of these materials). To replace the insulating material with another material, it is desirable to have an etch process that can remove the insulator without removing, damaging, or degrading the conducting layer or its associated “liner” material(s). If incorrect conditions are used, then the conducting layer(s) and its' (their) associated liner layer(s) can be eroded, leaving a small pointed region of conductor.
SUMMARY OF THE INVENTION
In view of the above, the protection of exposed conductor and liner surfaces is accomplished by deposition of a plasma generated polymer film during a dielectric etch process. A plasma process chemistry is chosen to allow etching of the removable dielectric film while depositing a protective film on the exposed metal surfaces. This protective film will prevent subsequent etching or sputtering of the exposed conductor and liner materials. The polymer film on the metal surfaces can be removed in a subsequent process step by a technique that will not damage the exposed conductor surface, such as a down stream plasma asher, chemical dry etcher, low-bias reactive ion etcher, or in a suitable wet process.
As the sacrificial dielectric film is etched to endpoint, a protective film deposited on the now-exposed underlying low-k film (if present) will prevent plasma modification of this underlying dielectric. This is particularly critical to low-k systems such as Hydrogen Silsesquioxane (HSSQ) or Methylsilsesquioxane (MSSQ), which can be substantially modified to give a higher dielectric constant film. The process that removes the protective polymer from the conductor or liner surfaces will also remove it from the low-k film surface.


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