Post ECP multi-step anneal/H2 treatment to reduce film impurity

Details Post ECP multi-step anneal/H2 treatment to reduce film impurity Post ECP multi-step anneal/H2 treatment to reduce film impurity

2006-04-18

2006-04-18

Le, Dung A. (Department: 2818)

Semiconductor device manufacturing: process

Coating with electrically or thermally conductive material

To form ohmic contact to semiconductive material

C438S637000, C438S638000, C438S672000, C438S673000

Reexamination Certificate

active

07030016

ABSTRACT:
A method of forming a copper interconnect in a dual damascene scheme is described. After a diffusion barrier layer and seed layer are sequentially formed on the sidewalls and bottoms of a trench and via in a dielectric layer, a first copper layer is deposited by a first ECP process at a 10 mA/cm2current density to fill the via and part of the trench. A first anneal step is performed to remove carbon impurities and optionally includes a H2plasma treatment. A second ECP process with a first deposition step at a 40 mA/cm2current density and second deposition step at a 60 mA/cm2current density is used to deposit a second copper layer-that overfills the trench. After a second anneal step, a CMP process planarizes the copper layers. Fewer copper defects, reduced S, Cl, and C impurities, and improved Rc performance are achieved by this method.

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