Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-06-15
2002-11-05
Everhart, Caridad (Department: 2825)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S204000, C438S218000, C438S234000
Reexamination Certificate
active
06475848
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a bipolar transistor and, more particularly, to a polysilicon-edge, low-power, high-frequency bipolar transistor and a method of forming the transistor.
2. Description of the Related Art
A high-frequency bipolar transistor is a device that can turn off and on again fast enough to respond to a high-frequency signal without distorting the wave shape of the signal. A low-power high-frequency bipolar transistor is a device that consumes very little power in responding to the high-frequency signal. Low-power high-frequency bipolar transistors are used in wireless applications, and are finding uses in emerging optical networking applications.
FIG. 1
shows a cross-sectional diagram that illustrates a portion of a prior-art, low-power high-frequency bipolar transistor
100
. As shown in
FIG. 1
, transistor
100
includes a collector layer
110
, a base layer
112
that is formed on collector layer
110
, and a field oxide region FOX that adjoins layer
112
. In addition, transistor
100
includes a thin oxide layer
114
that is formed on a portion of base layer
112
and the field oxide region FOX, and a n+ extrinsic emitter
116
that is formed on thin oxide layer
114
.
As further shown in
FIG. 1
, transistor
100
also includes an n+ emitter region
118
that is formed in base layer
112
, and an n+ poly ridge
120
that is connected to extrinsic emitter
116
and n+ emitter region
118
. Extrinsic emitter
116
, emitter region
118
, and poly ridge
120
form the emitter of the transistor.
Transistor
100
additionally includes a silicided base contact
122
that is formed on base layer
112
, and a silicided emitter contact
124
that is formed on extrinsic emitter
116
. In addition, an oxide spacer
126
is formed on base layer
112
between poly ridge
120
and base contact
122
.
During fabrication, emitter region
118
is formed from dopants diffusing from poly ridge
120
into base layer
112
. As a result, a very small base-to-emitter junction results. A small base-to-emitter junction reduces the base-to-emitter capacitance which, in turn, allows low-power high-frequency operation.
One drawback of transistor
100
, however, is that transistor
100
has a large base-to-collector capacitance which, in turn, limits the operation of the transistor. Thus, there is a need for a low-power high-frequency bipolar transistor with a reduced base-to-emitter capacitance and base-to-collector capacitance.
SUMMARY OF THE INVENTION
The present invention provides a low-power high-frequency bipolar transistor that reduces the base resistance, the base-to-emitter capacitance, and the base-to-collector capacitance. Thus, the present invention provides the advantages of the prior-art transistor while reducing the high base-to-collector capacitance of the prior-art bipolar transistor.
The bipolar transistor of the present invention is formed on a wafer that has a buried layer and a first epitaxial layer of a first conductivity type. The first epitaxial layer is formed over the buried layer and has a smaller dopant concentration than the buried layer.
The bipolar transistor has an intrinsic base region of a second conductivity type that is formed on the first epitaxial layer. The intrinsic base region has a first side wall, a second side wall, and a top surface that is connected to the first side wall via a first notch and to the second side wall via a second notch.
The bipolar transistor also has a layer of isolation material that is formed on the first epitaxial layer. The layer of isolation material contacts the first side wall and the second side wall of the intrinsic base region, and is formed over the first notch and the second notch. In addition, the bipolar transistor includes an intrinsic emitter region that is formed in the intrinsic base region, an extrinsic base that is formed on the layer of isolation material, and an extrinsic emitter that is formed on the layer of isolation material.
The bipolar transistor further includes a conductive base spacer that is connected to the extrinsic base and the intrinsic base region, and a conductive emitter spacer that is connected to the extrinsic emitter and the intrinsic base region. The conductive base spacer is formed over the first notch, while the conductive emitter spacer is formed over the second notch.
The present invention also includes a method for forming a low-power high-frequency bipolar transistor. The bipolar transistor is formed on a wafer that has a buried layer and a first epitaxial layer of a first conductivity type. The first epitaxial layer is formed over the buried layer and has a smaller dopant concentration than the buried layer.
The method of the present invention begins by forming a layer of isolation material on the first epitaxial layer, and forming an extrinsic base and an extrinsic emitter on the layer of isolation material. The extrinsic base, which is spaced apart from the extrinsic emitter, has a second conductivity type while the extrinsic emitter has the first conductivity type.
The method also includes the step of etching the layer of isolation material to form an opening in the layer of isolation material. The opening is between the extrinsic base and the extrinsic emitter, and exposes a surface of the first epitaxial layer. The method further includes the steps of forming a first intrinsic base region on the first epitaxial layer in the first opening, and forming an isolation region on the first intrinsic base region in the first opening.
The method additionally includes the step of forming a sacrificial material on the isolation region over the first intrinsic base region in the first opening. The method further includes the steps of etching the isolation region, and removing the sacrificial material after the isolation region has been etched.
In addition, a base spacer is formed that contacts the extrinsic base and the layer of isolation material formed on the first intrinsic base region, and an emitter spacer is formed that contacts the extrinsic emitter and the layer of isolation material on the first intrinsic base region. The base spacer is spaced apart from the emitter spacer.
The method also includes the step of etching the layer of isolation material to form a gap between the base spacer and the first intrinsic base region, and the emitter spacer and the first intrinsic base region. The method further includes the step of forming a second intrinsic base region to fill up the gap so that the second intrinsic base region contacts the first intrinsic base region, the base spacer, and the emitter spacer.
A better understanding of the features and advantages of the present invention will be obtained by reference to the following detailed description and accompanying drawings that set forth an illustrative embodiment in which the principles of the invention are utilized.
REFERENCES:
patent: 5994196 (1999-11-01), Seog
patent: 6380017 (2002-04-01), Darwish et al.
C.A. King et al., “Very Low Cost Graded SiGe Base Bipolar Transistors for a High-Performance Modular BiCMOS Process”, IEDM, 1999, pp. 565-568.
Wim van der Wel et al., “Poly-Ridge Emitter Transistor (PRET): Simple Low-Power Option to a Bipolar Process”, IEDM, 1993, pp. 453-456.
Darwish Mohamed N.
Razouk Reda
Sadovnikov Alexei
Everhart Caridad
National Semiconductor Corporation
Pickering Mark C.
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