Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2001-06-15
2002-04-30
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C257S565000
Reexamination Certificate
active
06380017
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a bipolar transistor and, more particularly, to a polysilicon-edge, base-emitter super self-aligned, low-power, high-frequency bipolar transistor and a method of forming the transistor.
2. Description of the Related Art
A high-frequency bipolar transistor is a device that can turn off and on again fast enough to respond to a high-frequency signal without distorting the wave shape of the signal. A low-power high-frequency bipolar transistor is a device that consumes very little power in responding to the high-frequency signal. Low-power high-frequency bipolar transistors are used in wireless applications, and are finding uses in emerging optical networking applications.
FIG. 1
shows a cross-sectional diagram that illustrates a portion of a prior-art, low-power high-frequency bipolar transistor
100
. As shown in
FIG. 1
, transistor
100
includes a collector layer
110
, a base layer
112
that is formed on collector layer
110
, and a field oxide region FOX that adjoins layer
112
. In addition, transistor
100
includes a thin oxide layer
114
that is formed on a portion of base layer
112
and the field oxide region FOX, and a n+ extrinsic emitter
116
that is formed on thin oxide layer
114
.
As further shown in
FIG. 1
, transistor
100
also includes an n+ emitter region
118
that is formed in base layer
112
, and an n+ poly ridge
120
that is connected to extrinsic emitter
116
and n+ emitter region
118
. Extrinsic emitter
116
, emitter region
118
, and poly ridge
120
form the emitter of the transistor.
Transistor
100
additionally includes a silicided base contact
122
that is formed on base layer
112
, and a silicided emitter contact
124
that is formed on extrinsic emitter
116
. In addition, an oxide spacer
126
is formed on base layer
112
between poly ridge
120
and base contact
122
.
During fabrication, emitter region
118
is formed from dopants diffusing from poly ridge
120
into base layer
112
. As a result, a very small base-to-emitter junction results. A small base-to-emitter junction reduces the base-to-emitter capacitance. Reduced capacitance, in turn, provides low-power high-frequency operation.
One drawback of transistor
100
, however, is that transistor
100
has a large base-to-collector capacitance which, in turn, limits the operation of the transistor. Thus, there is a need for a low-power high-frequency bipolar transistor with a reduced base-to-emitter capacitance and base-to-collector capacitance.
SUMMARY OF THE INVENTION
The present invention provides a low-power high-frequency bipolar transistor that reduces the base resistance, the base-to-emitter capacitance, and the base-to-collector capacitance. The bipolar transistor of the present invention is formed on a wafer that has a buried layer and a first epitaxial layer of a first conductivity type. The first epitaxial layer is formed over the buried layer, and has a smaller dopant concentration than the buried layer.
The bipolar transistor has an intrinsic base region of a second conductivity type that is formed on the surface of the first epitaxial layer in the opening. The bipolar transistor also has a layer of isolation material that is formed on the surface of the first epitaxial layer to adjoin the intrinsic base region.
In addition, the bipolar transistor has a first spacer that is formed on the layer of isolation material and the intrinsic base region, and a second spacer that is formed on the layer of isolation material and the intrinsic base region. The second spacer is spaced apart from the first spacer. The transistor further includes an extrinsic base that is formed on the layer of isolation material, an intrinsic emitter region that is formed in the intrinsic base region, and an extrinsic emitter that is formed on the layer of isolation material.
The bipolar transistor also includes a first conductive spacer that is formed on the first isolating spacer to contact the extrinsic base and the intrinsic base region, and a second conductive spacer that is formed on the second isolating spacer to contact the extrinsic emitter and the intrinsic emitter region of the intrinsic base region. The second conductive spacer is spaced apart from the first conductive spacer.
The present invention also includes a method for forming a low-power high-frequency bipolar transistor. The bipolar transistor is formed on a wafer that has a buried layer and a first epitaxial layer of a first conductivity type. The first epitaxial layer is formed over the buried layer and has a smaller dopant concentration than the buried layer.
The bipolar transistor additionally has an intrinsic base region of a second conductivity type that is formed on only a portion of the first epitaxial layer, and a layer of isolation material that contacts the first epitaxial layer and the intrinsic base region. The bipolar transistor further has an extrinsic base that is formed on the layer of isolation material, and an extrinsic emitter spaced apart from the extrinsic base that is formed on the layer of isolation material. The bipolar transistor additionally has a base spacer that is connected to the intrinsic base and the extrinsic base, and an emitter spacer that is connected to the intrinsic base and the extrinsic emitter.
The present invention also includes a method for forming a low-power high-frequency bipolar transistor. The bipolar transistor is formed on a wafer that has a buried layer and a first epitaxial layer of a first conductivity type. The first epitaxial layer is formed over the buried layer and has a smaller dopant concentration than the buried layer.
The method of the present invention begins by forming a layer of isolation material on the first epitaxial layer, and forming an extrinsic base and an extrinsic emitter on the layer of isolation material. The extrinsic base, which is spaced apart from the extrinsic emitter, has a second conductivity type while the extrinsic emitter has the first conductivity type.
The method also includes the step of etching the layer of isolation material to form a first opening in the layer of isolation material. The first opening is between the extrinsic base and the extrinsic emitter, and exposes a surface of the first epitaxial layer. The method further includes the step of forming an intrinsic base region on the first epitaxial layer in the first opening.
The method additionally includes the step of forming a first insulating spacer, a second insulating spacer, and an insulating plug on the intrinsic base region in the first opening. The first insulating spacer contacts the extrinsic base, the second insulating spacer is spaced apart from the first insulating spacer and contacts the extrinsic emitter. The insulating plug is spaced apart from the first and second insulating spacers, and formed between the first and second insulating spacers.
Further, the method includes the step of forming a base spacer that contacts the extrinsic base and the intrinsic base between the first insulating spacer and the insulating plug, and an emitter spacer that contacts the extrinsic emitter and the intrinsic base between the second insulating spacer and the insulating plug.
A better understanding of the features and advantages of the present invention will be obtained by reference to the following detailed description and accompanying drawings that set forth an illustrative embodiment in which the principles of the invention are utilized.
REFERENCES:
patent: 5523244 (1996-06-01), Vu et al.
patent: 5721147 (1998-02-01), Yoon
C.A. King et al., “Very Low Cost Graded SiGe Base Bipolar Transistors for a High-Performance Modular BiCMOS Process”, IEDM, 1999, pp. 565-568.
Wim van der Wel et al., “Poly-Ridge Emitter Transistor (PRET): Simple Low-Power Option to a Bipolar Process”, IEDM, 1993, pp. 453-456.
Darwish Mohamed N.
Razouk Reda
Sadovnikov Alexei
Hoang Quoc
National Semiconductor Corporation
Nelms David
Pillsbury & Winthrop LLP
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