Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2008-04-08
2008-04-08
Smith, Matthew (Department: 2823)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S654000, C438S660000, C438S663000, C257SE21624
Reexamination Certificate
active
11420940
ABSTRACT:
A CMOS gate stack that increases the inversion capacitance compared to a conventional CMOS gate stack has been described. Using a poly-SiGe gate, instead of the conventional poly-Si gate near the gate dielectric layer, increases the amount of implanted dopant that can be activated. This increase overcomes the polysilicon depletion problem that limits the inversion capacitance in the conventional CMOS gate stack. To integrate the poly-SiGe layer into the gate stack, a thin α-Si layer is deposited between the gate dielectric layer and the poly-SiGe layer. To ensure proper salicide formation, a poly-Si layer is capped over the poly-SiGe layer. In order to obtain a fined-grained poly-Si over poly-SiGe, a second α-Si layer is deposited between the poly-Si layer and the poly-SiGe layer.
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Paranjpe Ajit
Zhang Kangzhan
Applied Materials Inc.
Maldonado Julio J
Patterson & Sheridan LLP
Smith Matthew
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